The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2014

Filed:

Oct. 20, 2010
Applicants:

Abhishek Bansal, Bangalore, IN;

Nitin Gupta, Bangalore, IN;

Brad L. Herold, Austin, TX (US);

Jayakumar N Sankarannair, Bangalore, IN;

Inventors:

Abhishek Bansal, Bangalore, IN;

Nitin Gupta, Bangalore, IN;

Brad L. Herold, Austin, TX (US);

Jayakumar N Sankarannair, Bangalore, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one implementation, processor testing may include the ability to randomly generate a first plurality of branch instructions for a first portion of an instruction set, each branch instruction in the first portion branching to a respective instruction in a second portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. Processor testing may also include the ability to randomly generate a second plurality of branch instructions for the second portion of the instruction set, each branch instruction in the second portion branching to a respective instruction in the first portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. Processor testing may additionally include the ability to generate a plurality of instructions to increment a counter when each branch instruction is encountered during execution.


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