The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2014

Filed:

Jan. 06, 2012
Applicants:

Steven C. Goss, Antibes, FR;

Gregory R. Conti, Saint Paul, FR;

Narendar Shankar, Santa Clara, CA (US);

Mehdi-laurent Akkar, Juan les Pins, FR;

Aymeric Vial, Juan les Pins, FR;

Inventors:

Steven C. Goss, Antibes, FR;

Gregory R. Conti, Saint Paul, FR;

Narendar Shankar, Santa Clara, CA (US);

Mehdi-Laurent Akkar, Juan les Pins, FR;

Aymeric Vial, Juan les Pins, FR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 12/12 (2006.01); G06F 12/00 (2006.01); G06F 12/02 (2006.01); H04B 1/38 (2006.01); H04L 29/06 (2006.01); H04W 12/06 (2009.01); G06F 21/57 (2013.01); G06F 21/79 (2013.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); H04L 63/20 (2013.01); H04W 12/06 (2013.01); G06F 21/575 (2013.01); H04L 63/18 (2013.01); G06F 21/79 (2013.01); G06F 12/145 (2013.01);
Abstract

A secure demand paging (SDP) system includes a dynamic random access memory (DRAM), a microprocessor having a secure internal memory and coupled to said DRAM, and a non-volatile memory storing a representation of operations accessible by the microprocessor. The stored representation of operations includes a coded physical representation of operations to configure an SDP space in the DRAM, to organize the SDP space into virtual machine contexts, to organize at least one of the virtual machine contexts into block book keeping blocks and book keeping spaces in the block book keeping blocks, and to execute a secure demand paging process between said secure internal memory and said DRAM.


Find Patent Forward Citations

Loading…