The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2014

Filed:

May. 04, 2012
Applicants:

Esin Terzioglu, San Diego, CA (US);

Changho Jung, San Diego, CA (US);

Shahzad Nazar, San Diego, CA (US);

Inventors:

Esin Terzioglu, San Diego, CA (US);

Changho Jung, San Diego, CA (US);

Shahzad Nazar, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Memory pre-decoder circuits employing pulse latch(es) for reducing memory access times, and related systems and methods are disclosed. In one embodiment, the memory pre-decoder circuit includes a memory pre-decoder configured to pre-decode a memory address input within a memory pre-decode setup path to generate a pre-decoded memory address input. Additionally, a pulse latch is provided in the memory pre-decoder circuit outside of the memory pre-decode setup path. The pulse latch samples the pre-decoded memory address input based on a clock signal and generates a pre-decoded memory address output. As such, the memory pre-decode setup path sets up the pre-decoded memory address input prior to the clock signal for the pulse latch. In this manner, the pulse latch is configured to generate a pre-decoded memory address output without increasing setup times in the memory pre-decode setup path.


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