The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2014
Filed:
Aug. 01, 2011
Rafael M. Vilela, Campinas, BR;
Walter Luis Tercariol, Campinas, BR;
Fernando Zampronho Neto, Campinas, BR;
Sandro A. P. Haddad, Aguas Claras, BR;
Rafael M. Vilela, Campinas, BR;
Walter Luis Tercariol, Campinas, BR;
Fernando Zampronho Neto, Campinas, BR;
Sandro A. P. Haddad, Aguas Claras, BR;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A circuit includes a memory () coupled to an analog line coverage circuit (). The analog line coverage circuit includes a plurality of buffers (-) in which each buffer is coupled to one memory location of the memory, a plurality of bin cells (-) in which each bin cell is coupled to a buffer, a multiplexer (), each input terminal of which is coupled to a bin cell, and an analog-to-digital converter () coupled to the multiplexer and to an output terminal of the analog line coverage circuit. The analog line coverage circuit stores an analog voltage that is representative of a number of occasions that a memory location is accessed, and outputs a signal indicative thereof. A processor () is coupled to the memory and to the analog line coverage circuit, and the processor enables the analog line coverage circuit when the processor is in a debug mode.