The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
Nov. 19, 2012
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Jae-Bum Ko, Gyeonggi-do, KR;
Sang-Jin Byeon, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/10 (2006.01); G11C 8/12 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 8/10 (2013.01); G11C 8/12 (2013.01); G11C 8/08 (2013.01);
Abstract
An integrated circuit includes a plurality of mode register set (MRS) setting blocks configured to generate a plurality of additive latency (AL) codes in response to an MRS signal, and a decoding unit configured to decoding the plurality of AL codes in response to a stack information signal to generate a plurality of AL setting signals.
Ko, Jae-Bum. (2014). Integrated circuit including semiconductor memory devices having stack structure (U.S. Patent No. 8804453). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8804453
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile