The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Aug. 24, 2012
Applicants:

Martin Popp, Chur, CH;

Beat DE Coi, Sargans, CH;

Marco Annese, Chur, CH;

Inventors:

Martin Popp, Chur, CH;

Beat De Coi, Sargans, CH;

Marco Annese, Chur, CH;

Assignee:

Espros Photonics AG, Sargans, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); H01L 29/96 (2006.01); H01L 21/3213 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32139 (2013.01); H01L 21/0038 (2013.01); H01L 21/0337 (2013.01);
Abstract

A method for producing semiconductor components on a substrate including photolithographic patterning steps, in which method, on the substrate, a first layer to be patterned is applied and a second layer serving as a mask layer for the first layer to be patterned is applied, wherein a third layer serving as a mask for the second layer is applied, and wherein at least two photolithographic patterning processes are carried out successively for the second layer, wherein, during one of the patterning processes, after the production of a structure made from a photosensitive layer for the provision of a mask layer for a patterning process at the third layer, positive ramp angles α are produced at the patterning edges of the third layer, as a result of which the structures remaining free, given a thickness h of the third layer, decrease in size by a value D=2*h/tan α.


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