The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2014
Filed:
Jun. 29, 2012
Toshihiko Suzuki, Kawasaki, JP;
Hidenori Takahashi, Yokohama, JP;
Terumasa Haneda, Machida, JP;
Atsushi Uchida, Kawasaki, JP;
Toshihiko Suzuki, Kawasaki, JP;
Hidenori Takahashi, Yokohama, JP;
Terumasa Haneda, Machida, JP;
Atsushi Uchida, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A non-volatile semiconductor memory device includes: a memory unit including a plurality of memory cells, each of the plurality of memory cells to perform a multi-level storage operation by assigning a value including a plurality of bits to at least four data states defined according to a threshold level; and a controller to control the memory unit, wherein the controller sets at least one of the plurality of bits to an error correction bit that indicates one of a first state and a second state; assigns the first state to the error correction bits that correspond to the data states having a minimum threshold level and a maximum threshold level and the second state to the error correction bits that correspond to the data state having other threshold level; and resets the error correction bit to the first state when the error correction bit indicates the second state.