The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 05, 2014
Filed:
Mar. 28, 2012
Applicants:
Masahiro Yoshihara, Yokohama, JP;
Katsumi Abe, Yokohama, JP;
Inventors:
Masahiro Yoshihara, Yokohama, JP;
Katsumi Abe, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1078 (2013.01); G11C 7/1087 (2013.01); G11C 7/1051 (2013.01); G11C 7/106 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract
According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.
Yoshihara, Masahiro. (2014). Semiconductor memory and semiconductor memory control method (U.S. Patent No. 8797807). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8797807
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile