The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2014
Filed:
Sep. 17, 2010
Ryan Abel Heckendorf, Rochester, MN (US);
Kerry Christopher Imming, Rochester, MN (US);
John David Irish, Rochester, MN (US);
Ibrahim Abdel-rahman Ouda, Rochester, MN (US);
Ryan Abel Heckendorf, Rochester, MN (US);
Kerry Christopher Imming, Rochester, MN (US);
John David Irish, Rochester, MN (US);
Ibrahim Abdel-Rahman Ouda, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and circuit for implementing lane shuffle for fault-tolerant communication links, and a design structure on which the subject circuit resides are provided. Shuffle hardware logic steers a set of virtual data lanes onto a set of physical optical lanes, steering around all lanes that are detected as bad during link initialization training. A mask status register is loaded with a mask of lane fail information during link training, which flags the bad lanes, if any. The shuffle hardware logic uses a shift template, where each position in the starting template is a value representing the corresponding lane position. The shift template is cascaded through a set of shifters controlled by the fail mask.