The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2014

Filed:

Dec. 12, 2008
Applicants:

Wei Duan, Haidian District, CN;

Xiaoyu LI, Haidian District, CN;

Inventors:

Wei Duan, Haidian District, CN;

Xiaoyu Li, Haidian District, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/318 (2006.01); G06F 9/30 (2006.01); G06F 9/302 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30134 (2013.01); G06F 9/30101 (2013.01); G06F 9/3001 (2013.01); G06F 9/30181 (2013.01);
Abstract

A Reduced Instruction Set Computing (RISC) processor is capable of emulating operation of a floating-point register stack. The RISC processor may include a floating-point register file containing a plurality of floating-point registers, a decoding section for decoding operation instructions, and a floating-point operation section. The RISC processor may also include a control register for controlling status of floating-point registers, and for controlling the decoding section and the floating-point operation section, to thereby emulate a floating-point register stack using the floating-point register file. The decoding section may include a pointer register for maintaining a stack operation pointer, and for storing a value of the stack operation pointer. The floating-point operation section may also include a pointer operation module for operating the pointer register, for emulating stack operation of the stack pointer of the pointer register, and for modifying and monitoring the stack pointer during emulation of floating-point register stack.


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