The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2014

Filed:

Dec. 30, 2010
Applicants:

Jinsoup Joung, Seongnam-si, KR;

Kyeongmin Ha, Seongnam-si, KR;

Joohyeong Lee, Seoul, KR;

Inventors:

Jinsoup Joung, Seongnam-si, KR;

Kyeongmin Ha, Seongnam-si, KR;

Joohyeong Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H03H 17/06 (2006.01); H03H 17/04 (2006.01); H03H 17/00 (2006.01);
U.S. Cl.
CPC ...
H03H 17/0444 (2013.01); H03H 17/0642 (2013.01); H03H 17/0027 (2013.01);
Abstract

Disclosed herein is a digital re-sampling apparatus. The digital re-sampling apparatus includes a sample buffer, a sample buffer control unit, a filter bank, a first delay bank, a fractional delay constant table, a combiner bank, and a second delay bank. The sample buffer temporarily stores an input sample in synchronization with an input sampling frequency. The sample buffer control unit controls writing and reading operations. The filter bank includes a number of digital filters equal to the number of stages, and filters the input sample. The first delay bank differentially delays a filter output value. The fractional delay constant table stores information about re-sampling time. The combiner bank includes a number of adders and multipliers, performs an operation, and outputs a re-sampled value. The second delay bank causes a delay so that output of each combiner can be synchronized with each output of the fractional delay constant table.


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