The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2014

Filed:

Jun. 29, 2012
Applicants:

Deepanshu Dutta, San Jose, CA (US);

Ken Oowada, Fujisawa, JP;

Koichi Nishimura, Kanagawa, JP;

Yingda Dong, San Jose, CA (US);

Inventors:

Deepanshu Dutta, San Jose, CA (US);

Ken Oowada, Fujisawa, JP;

Koichi Nishimura, Kanagawa, JP;

Yingda Dong, San Jose, CA (US);

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

In connection with an erase operation of a block of non-volatile storage elements, a determination is made as to whether the block is partially but not fully programmed. A degree of partial programming can be determined by a pre-erase read operation which determines a highest programmed word line, or which determines whether there is a programmed storage element in a subset of word lines above a small subset of source side word lines. Since a partially programmed block will pass an erase-verify test more easily than a fully programmed block, a measure is taken to ensure that the block is sufficiently deeply erased. In one approach, an erase-verify test is made stricter by adjusting a sensing parameter when the block is partially programmed. In another approach, the block can be programmed before being erased. Or, an extra erase pulse which is not followed by an erase-verify test can be applied.


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