The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
Sep. 26, 2007
Chris M. Giles, Ft. Collins, CO (US);
Russ W. Herrell, Ft. Collins, CO (US);
John A. Morrison, Ft. Collins, CO (US);
Andrew R. Wheeler, Ft. Collins, CO (US);
Gerald J. Kaufman, Jr., Ft. Collins, CO (US);
Leith L. Johnson, Ft. Collins, CO (US);
Daniel Zilavy, Ft. Collins, CO (US);
Chris M. Giles, Ft. Collins, CO (US);
Russ W. Herrell, Ft. Collins, CO (US);
John A. Morrison, Ft. Collins, CO (US);
Andrew R. Wheeler, Ft. Collins, CO (US);
Gerald J. Kaufman, Jr., Ft. Collins, CO (US);
Leith L. Johnson, Ft. Collins, CO (US);
Daniel Zilavy, Ft. Collins, CO (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A system and method for achieving one or more protected regions within a computer system having multiple partitions are disclosed. In at least some embodiments, the system includes an intermediary device for use within the computer system having the multiple partitions. The intermediary device includes a fabric device, and a first firewall device capable of limiting communication of a signal based upon at least one of a source of the signal and an intended destination of the signal, the first firewall device being at least indirectly coupled to the fabric device. The intermediary device further includes a first conversion device that is one of integrated with the first firewall device and distinct from the first firewall device, and that is capable of converting between a processor address and a fabric address for use by the fabric device. In some embodiments, the various devices each include Control and Status Registers (CSRs).