The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2014

Filed:

Jun. 10, 2008
Applicants:

David L. Matthews, Cypress, TX (US);

Hubert E. Brinkmann, Spring, TX (US);

James Xuan Dinh, Austin, TX (US);

Dwight D. Riley, Houston, TX (US);

Paul V. Brownell, Houston, TX (US);

Inventors:

David L. Matthews, Cypress, TX (US);

Hubert E. Brinkmann, Spring, TX (US);

James Xuan Dinh, Austin, TX (US);

Dwight D. Riley, Houston, TX (US);

Paul V. Brownell, Houston, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 13/00 (2006.01); H04L 12/28 (2006.01);
U.S. Cl.
CPC ...
H04L 12/28 (2013.01);
Abstract

In one embodiment, a computer system, comprises at least one host node, at least one input/output node coupled to the host node, at least one multi-function device coupled to the input/output node via a switch, and a middle manager processor comprising logic to block an enumeration process in a host node for the multi-function devices behind the switch hierarchy, initiate an enumeration process for the multi-function devices in a manager processor separate from the host node, store a routing table for the switch hierarchy in a memory module coupled to the manager processor, and allocate, in the manager processor, endpoint device resources to the host node.


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