The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2014

Filed:

Apr. 18, 2011
Applicants:

Ullas Balan Nambiar, Haryana, IN;

Smruti Ranjan Sarangi, Gurgaon, IN;

Biplav Srivastava, Noida, IN;

Vivek Tyagi, New Delhi, IN;

Inventors:

Ullas Balan Nambiar, Haryana, IN;

Smruti Ranjan Sarangi, Gurgaon, IN;

Biplav Srivastava, Noida, IN;

Vivek Tyagi, New Delhi, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 7/60 (2006.01); G06F 17/10 (2006.01); G06G 7/48 (2006.01); G06N 5/02 (2006.01); G06T 17/05 (2011.01); G06T 17/00 (2006.01); G06T 7/00 (2006.01); G06T 17/10 (2006.01);
U.S. Cl.
CPC ...
G06N 5/02 (2013.01); G06T 17/05 (2013.01); G06T 17/00 (2013.01); G06T 7/0081 (2013.01); G06T 17/10 (2013.01); G06T 2207/30184 (2013.01);
Abstract

Methods and arrangements for accommodating and synthesizing data for seeking broad-based solutions to complex problems. Logical models with respect to infrastructure in a first location are created. System-level models are created with respect to the logical models, and simulations are performed on the system-level models to verify expected behavior. Feedback is employed from the performed simulations to forecast changes in the system-level models.


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