The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
Jul. 12, 2010
Sachio Tsujino, Osaka, JP;
Yousuke Nakagawa, Osaka, JP;
Kazuhiro Maeda, Osaka, JP;
Ichiroh Shiraki, Osaka, JP;
Hiroaki Sugiyama, Osaka, JP;
Nobuhiro Kuwabara, Osaka, JP;
Sachio Tsujino, Osaka, JP;
Yousuke Nakagawa, Osaka, JP;
Kazuhiro Maeda, Osaka, JP;
Ichiroh Shiraki, Osaka, JP;
Hiroaki Sugiyama, Osaka, JP;
Nobuhiro Kuwabara, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
By reducing the potential drop of a storage node that occurs due to feedthrough, the capacitance of a storage capacitor is reduced and sensor sensitivity is improved. In a photosensor, the first terminal of a storage capacitor (C) and the gate of a MOS transistor (M), which outputs a signal in accordance with the potential of a storage node (N), are connected to the storage node (N). A forward biased pulse voltage is supplied to the anode of a first photodiode (DS) in a reset period, and a reverse biased voltage is supplied to the anode of the first photodiode in a storage period and a readout period. A reverse biased voltage is supplied to the anode of a second photodiode (DM) in all operation periods. A voltage that keeps the potential of the storage node lower than the threshold value of the MOS transistor (M) is supplied to the second terminal of the storage capacitor in the reset period and the storage period, and a voltage that thrusts the potential of the storage node (N) upward to the threshold value of the MOS transistor (M) or higher is supplied to the second terminal of the storage capacitor in the readout period.