The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2014

Filed:

Jun. 13, 2013
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Carl F Liepold, San Jose, CA (US);

Hans Van Antwerpen, Mountain View, CA (US);

John Kizziar, Spokane, WA (US);

Hans Klein, Pleasanton, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 27/26 (2006.01);
U.S. Cl.
CPC ...
G01R 27/2605 (2013.01);
Abstract

Apparatuses and methods of mutual-capacitance sensing with a capacitance-sensing circuit, such as a self-capacitance sensing device (CSD). One apparatus includes an input node coupled to a capacitance sense pin to couple to a first electrode of a sense array, a transmit (TX) signal generation circuit to generate a TX signal to drive a second electrode of the sense array, logic circuitry coupled to the TX signal generation circuit and the input node. The logic circuitry is configured to selectively couple a first capacitor to the input node and a second capacitor to the input node timed with the TX signal. The apparatus further includes an analog-to-digital converter (ADC) coupled to receive a receive (RX) signal from the input node and to convert the RX signal into a digital value, the digital value representing a mutual capacitance between the first electrode and the second electrode.


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