The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
Aug. 18, 2011
Kazumasa Tanida, Oita, JP;
Masahiro Sekiguchi, Kanagawa, JP;
Masayuki Dohi, Kanagawa, JP;
Tsuyoshi Matsumura, Oita, JP;
Hideo Numata, Oita, JP;
Mari Otsuka, Oita, JP;
Naoko Yamaguchi, Kanagawa, JP;
Takashi Shirono, Tokyo, JP;
Satoshi Hongo, Oita, JP;
Kazumasa Tanida, Oita, JP;
Masahiro Sekiguchi, Kanagawa, JP;
Masayuki Dohi, Kanagawa, JP;
Tsuyoshi Matsumura, Oita, JP;
Hideo Numata, Oita, JP;
Mari Otsuka, Oita, JP;
Naoko Yamaguchi, Kanagawa, JP;
Takashi Shirono, Tokyo, JP;
Satoshi Hongo, Oita, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.