The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
Apr. 01, 2013
Infineon Technologies Ag, Neubiberg, DE;
Knut Stahrenberg, Wappingers Falls, NY (US);
Jin-Ping Han, Fishkill, NY (US);
Infineon Technologies AG, Neubiberg, DE;
Abstract
Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a workpiece having a first region and a second region. The gate material stack includes a semiconductive gate material. A thickness is altered or a substance is introduced to the semiconductive gate material in the first region or the second region of the workpiece. The gate material stack is patterned in the first region and the second region resulting in a first transistor in the first region of the workpiece comprising an NMOS FET of a CMOS device and a second transistor in the second region of the workpiece comprising an NMOS FET of the CMOS device. The first transistor has a first threshold voltage and the second transistor has a second threshold voltage different than the first threshold voltage.