The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2014
Filed:
Mar. 28, 2012
Sophocles R. Metsis, Wakefield, MA (US);
Sophocles R. Metsis, Wakefield, MA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A system and method for efficiently addressing dies in a three-dimensional stacked integrated circuit. Multiple stacked dies may be included in a single package or module. At least two of the dies are vertically stacked. One or more of the dies may include die enumeration logic that generates a unique die address space identifier (ID) for a particular die. Unless a die is a base die, each die receives a unique die ID for itself from a die placed below itself. The die then generates a unique die ID for one or more dies placed above itself and sends these die IDs to the dies located on top of itself. If a die is a base die, then the logic may receive a root value for a first unique die ID within the vertical stack from the package substrate or silicon based interposer beneath it.