The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
Jul. 30, 2010
Jon Carroll, Milton, GA (US);
Doug Dimola, Woodstock, GA (US);
Andrew Frezell, Roswell, GA (US);
Ciena Corporation, Hanover, MD (US);
Abstract
The present disclosure provides systems and methods for a simulation environment that simulates hardware at a fiber level, a data plane level, a card level, and a chassis level. The simulation environment may be utilized in development and testing of complex, real time, embedded software systems, such as, for example, routers, switches, access devices, base stations, optical switches, optical add/drop multiplexers, Ethernet switches, and the like. In an exemplary embodiment, the simulation environment operates on one or more workstations utilizing a virtual machine to operate a virtualized module, line card, line blade, etc. Further, a plurality of virtual machines may operate together to operate a virtualized chassis forming a network element and with a plurality of virtualized chassis forming a network. Advantageously, the present invention provides state of the art data plane traffic and control plane simulation that reduces development time and cost while increasing design flexibility.