The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2014

Filed:

Oct. 11, 2011
Applicants:

Karl Kissa, West Simsbury, CT (US);

Allen T. Hall, Ellington, CT (US);

Inventors:

Karl Kissa, West Simsbury, CT (US);

Allen T. Hall, Ellington, CT (US);

Assignee:

JDS Uniphase Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/035 (2006.01); G02F 1/225 (2006.01); G02F 1/03 (2006.01); G02F 1/21 (2006.01);
U.S. Cl.
CPC ...
G02F 1/2255 (2013.01); G02F 1/0316 (2013.01); G02F 2001/212 (2013.01);
Abstract

An electro-optic device is disclosed, in which an RF signal electrode is used as a bias ground electrode. Thus, for Z-cut lithium niobate electro-optic crystals, there is no need to place a buried bias electrode under the RF signal electrode and over the optical waveguide. As a result, both optical and the RF wave propagation losses are reduced. In another embodiment, a buried bias electrode is placed over the optical waveguide between two buffer layers having a different electrical conductivity. The buffer layer underneath the buried bias electrode has a larger electrical conductivity than the buffer layer above the buried bias electrode. The buffer layer underneath the buried bias electrode reduces the optical loss penalty due to the buried bias electrode located above the optical waveguide, while the buffer layer above the bias electrode reduces leakage currents.


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