The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2014

Filed:

Nov. 21, 2012
Applicant:

Ess Technology, Inc., Fremont, CA (US);

Inventors:

Dustin Dale Forman, Kelowna, CA;

Trevor Blake Lynch-Staunton, West Kelowna, CA;

Montana T. C. Reid, Penticton, CA;

Assignee:

ESS Technology, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present application describes an apparatus and method for reducing distortion in a class-D amplifier. The power output section of the amplifier is driven by an adjusted PWM signal, rather than by a PWM signal created directly from the input analog signal. A reference output, designed to closely track the input analog signal, is compared to the amplifier output. The resulting difference is an error signal which is inverted and summed with a second analog signal corresponding to the directly created PWM signal and changes the timing of the voltage transitions of the second analog signal. The changed voltage transitions are used to create the adjusted PWM signal. The inversion of the error signal causes negative feedback which results in the adjustment of the PWM signal being in a direction which reduces the error signal and thus the distortion of the amplifier.


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