The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
Jun. 30, 2011
Mustafa Badaroglu, Leuven, BE;
Erik Jan Marinissen, Leuven, BE;
Paul Marchal, Blanden, BE;
IMEC, Leuven, BE;
Abstract
A test circuit and method for testing through-silicon-vias (TSVs) in three-dimensional integrated circuits (ICs) during each phase of manufacturing is disclosed. In one aspect, the method includes testing for faults in each individual TSV, TSV-under-test, shorts between a TSV-under-test, and TSVs in close proximity and for connections between the TSV-under-test and another tier in the ICs. A test circuit has three switchable current paths connected to a power supply via a pull-up resistor and switches: a calibration path, a short path, and a current measurement path. A power supply is connected to the measurement path, and the calibration path and the short path are connected to ground via respective pull-down resistors. For each TSV-under-test, the desired operation mode is selected by the closure of different combinations of switches. The current flowing through the pull-up resistor in each operation mode indicates whether the TSV-under-test has passed or failed the test.