The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 08, 2014
Filed:
Oct. 04, 2010
Koji Fukuda, Chofu, JP;
Hiroki Yamashita, Hachioji, JP;
Koji Fukuda, Chofu, JP;
Hiroki Yamashita, Hachioji, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A high-speed semiconductor integrated circuit device is achieved by adjusting an offset voltage. For example, dummy NMOS transistors MND(MNDand MND) and MND(MNDand MND) are connected to drain outputs of NMOS transistors MNand MNoperated according to differential input signals Din_p and Din_n, respectively. The MNDis arranged adjacent to the MN, and a source of the MNDa and a drain of the MNshare a diffusion layer. The MNDis arranged adjacent to the MN, and a source of the MNDand a drain of the MNshare a diffusion layer. The MNDand the MNDfunction as dummy transistors for suppressing variations in process of the MNand the MNand, and besides, they also function as means for adjusting the offset voltage by appropriately applying an offset-amount setting signal OFST to each gate to provide a capacitor to either the MNor the MN