The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2014

Filed:

Apr. 14, 2009
Applicants:

Viet Nguyen Hoang, Leuven, BE;

Radu Surdeanu, Roosbeek, BE;

Benoit Bataillou, Lyons, FR;

Inventors:

Viet Nguyen Hoang, Leuven, BE;

Radu Surdeanu, Roosbeek, BE;

Benoit Bataillou, Lyons, FR;

Assignee:

NXP, B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/146 (2006.01); H01L 21/3105 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14685 (2013.01); H01L 27/14629 (2013.01); H01L 27/14621 (2013.01); H01L 21/31053 (2013.01);
Abstract

A method of providing a dielectric material () having regions () with a varying thickness in an IC manufacturing process is disclosed. The method comprises forming a plurality of patterns in respective regions () of the dielectric material (), each pattern increasing the susceptibility of the dielectric material () to a dielectric material removal step by a predefined amount and exposing the dielectric material () to the dielectric material removal step. In an embodiment, the IC comprises a plurality of pixilated elements () and a plurality of light interference elements (), each comprising a first mirror element () and a second mirror element (), a region of the dielectric material () separating the first mirror element () and the second element (), and each being arranged over one of said pixilated elements (), the method further comprising forming the respective first mirror elements () in a dielectric layer () over a substrate () comprising the plurality of pixilated elements; depositing the dielectric material over the dielectric layer; and forming the respective second mirror elements such that each second mirror element is separated from a respective first mirror element by a region of the exposed dielectric material. Hence, an IC having a layer of a dielectric material () comprising regions of different thicknesses can be obtained requiring only a few process steps.


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