The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

May. 20, 2011
Applicants:

Hsien-ching Hsieh, New Taipei, TW;

Po-han Huang, Zhubei, TW;

Shing-wu Tung, Taipei, TW;

Inventors:

Hsien-Ching Hsieh, New Taipei, TW;

Po-Han Huang, Zhubei, TW;

Shing-Wu Tung, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2006.01); G06F 1/32 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 9/38 (2013.01); G06F 9/3853 (2013.01); G06F 9/3885 (2013.01); G06F 1/3287 (2013.01); G06F 1/3237 (2013.01); G06F 9/30181 (2013.01);
Abstract

A very long instruction word (VLIW) processor and an apparatus with power management and a method of power management therefor are provided in consistent with the exemplary embodiments of the disclosure. The power management method includes the following steps. Valid instruction(s) and no operation (NOP) instruction(s) of an input instruction package are rearranged to output a transcoded instruction package, wherein the transcoded instruction package by the rearrangement has its NOP instruction(s) corresponding to at least one execution unit, which is to be placed in power reduction state, of a VLIW processor. Power reduction control is selectively performed on at least one execution unit corresponding to at least one NOP instruction of the transcoded instruction package according to the transcoded instruction package.


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