The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2014
Filed:
Sep. 26, 2011
Valeria Mihalache, Santa Clara, CA (US);
Christopher H. Kingsley, Longmont, CO (US);
Jimmy Z. Wang, Saratoga, CA (US);
Kumar Deepak, San Jose, CA (US);
Valeria Mihalache, Santa Clara, CA (US);
Christopher H. Kingsley, Longmont, CO (US);
Jimmy Z. Wang, Saratoga, CA (US);
Kumar Deepak, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
One or more embodiments provide a load balancing solution for improving the runtime performance of parallel HDL simulators. During compilation each process is analyzed to determine a simulation cost based on complexity of the HDL processes. During simulation, processes to be executed in the same simulation cycle are scheduled using the simulation costs computed at compile-time in order to reduce the delay incurred during simulation.