The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Mar. 05, 2012
Applicants:

Wlodek Kurjanowicz, Arnprior, CA;

Steven Smith, Wakefield, CA;

Inventors:

Wlodek Kurjanowicz, Arnprior, CA;

Steven Smith, Wakefield, CA;

Assignee:

Sidense Corp., Ottawa, CA;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods for testing unprogrammed single transistor and two transistor anti-fuse memory cells include testing for connections of the cells to a bitline by comparing a voltage characteristic of a bitline connected to the cell under test to a reference bitline having a predetermined voltage characteristic. Some methods can use test cells having an access transistor identically configured to the access transistor of a normal memory cell, but omitting the anti-fuse device found in the normal memory cell, for testing the presence of a connection of the normal memory cell to the bitline. Such a test cell can be used in a further test for determining the level of capacitive coupling of the wordline voltage to the bitlines relative to that of a normal memory cell under test.


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