The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 2014
Filed:
Jun. 06, 2011
Jin Cai, Cortlandt Manor, NY (US);
Josephine Chang, Mahopac, NY (US);
Leland Chang, New York, NY (US);
Brian L. Ji, Fishkill, NY (US);
Steven John Koester, Ossining, NY (US);
Amlan Majumdar, White Plains, NY (US);
Jin Cai, Cortlandt Manor, NY (US);
Josephine Chang, Mahopac, NY (US);
Leland Chang, New York, NY (US);
Brian L. Ji, Fishkill, NY (US);
Steven John Koester, Ossining, NY (US);
Amlan Majumdar, White Plains, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Integrated circuits having combined memory and logic functions are provided. In one aspect, an integrated circuit is provided. The integrated circuit comprises: a substrate comprising a silicon layer over a BOX layer, wherein a select region of the silicon layer has a thickness of between about three nanometers and about 20 nanometers; at least one eDRAM cell comprising: at least one pass transistor having a pass transistor source region, a pass transistor drain region and a pass transistor channel region formed in the select region of the silicon layer; and a capacitor electrically connected to the pass transistor.