The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Feb. 08, 2013
Applicant:

National Semiconductor Corporation, Santa Clara, CA (US);

Inventor:

Alexander H. Owens, Los Gatos, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 21/76283 (2013.01); H01L 21/823878 (2013.01); H01L 21/823807 (2013.01);
Abstract

A semiconductor apparatus includes a first substrate and a second substrate located over a first portion of the first substrate and separated from the first substrate by a buried layer. The semiconductor apparatus also includes an epitaxial layer located over a second portion of the first substrate and isolated from the second substrate. The semiconductor apparatus further includes a first transistor formed at least partially in the second substrate and a second transistor formed at least partially in or over the epitaxial layer. The second substrate and the epitaxial layer have bulk properties with different electron and hole mobilities. At least one of the transistors is configured to receive one or more signals of at least about 5V. The first substrate could have a first crystalline orientation, and the second substrate could have a second crystalline orientation.


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