The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Jun. 18, 2012
Applicants:

Lei Wang, Fremont, CA (US);

Luc Ving Chung, Fremont, CA (US);

Inventors:

Lei Wang, Fremont, CA (US);

Luc Ving Chung, Fremont, CA (US);

Assignee:

Western Digital (Fremont), LLC, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B 5/127 (2006.01); H04R 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for bonding a first substrate to a second substrate is described. The first substrate includes a first plurality of solder pads, a first alignment mark set, and a first plurality of dots. The second substrate includes a second plurality of solder pads, a second alignment mark set, and a second plurality of dots configured to interlock with the first plurality of dots. The method includes aligning the first alignment mark set with the second alignment mark set. The first alignment mark sets being aligned corresponds to the dots and the solder pads being aligned. The method also includes locking the first plurality of dots with the second plurality of dots to form an interlocking key. The method also includes reflowing at least one of the first and second pluralities of solder pads. The dots remain substantially solid during the reflow.


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