The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2014
Filed:
Oct. 31, 2011
Matthew Brown, Kinburn, CA;
Dimitrios Giannakopoulos, Metheun, MA (US);
Matthew Brown, Kinburn, CA;
Dimitrios Giannakopoulos, Metheun, MA (US);
Applied Micro Circuits Corporation, Sunnyvale, CA (US);
Abstract
An Ethernet physical layer (PHY) module is provided with a method for transceiving between a 10GBASE-R client interface and a 100G attachment interface. On each of ten client interface logical lanes a 10GBASE-R signal is accepted. Each 10GBASE-R logical lane is demultiplexed into two 5 gigabit per second (Gbps) pseudo 100GBASE-R logical lanes, creating a total of twenty pseudo 100GBASE-R logical lanes. The pseudo 100GBASE-R logical lanes are arranged into n groups of 20/n pseudo 100GBASE-R logical lanes. Further, the pseudo 100GBASE-R logical lanes from each group are arranged into a 100G attachment logical lane. Finally, a 100G attachment logical lane is transmitted at an attachment interface on each of n physical lanes. In the reverse direction, each of n physical lanes accepts a 100G attachment logical lane at the attachment interface, and a de-aggregation process supplies a 10GBASE-R signal on each of ten client interface logical lanes.