The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2014

Filed:

Nov. 23, 2010
Applicants:

Toshiaki Suzuki, Kanagawa, JP;

Tsuyoshi Kamada, Kanagawa, JP;

Yuji Nakahata, Kanagawa, JP;

Makoto Nakagawa, Tokyo, JP;

Inventors:

Toshiaki Suzuki, Kanagawa, JP;

Tsuyoshi Kamada, Kanagawa, JP;

Yuji Nakahata, Kanagawa, JP;

Makoto Nakagawa, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G09G 2310/0286 (2013.01);
Abstract

There is provided a display device including an array substrate including pixels arranged in a matrix manner and gate control circuits that scan gate lines of the pixels and that are provided on the array substrate such that the gate control circuits correspond to the respective gate lines of the pixels. Each of the gate control circuits includes a first output terminal that outputs a signal to each of the gate lines, and a second output terminal that outputs a signal that is supplied to a gate control circuit in a subsequent stage. When adjacent two of the gate lines are scanned simultaneously from an upper part of a screen by the signal output from the first output terminal of each of the gate control circuits, a gate on period is provided during which outputs from the first output terminals of adjacent two of the gate control circuits are the same.


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