The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2014

Filed:

Feb. 25, 2011
Applicants:

Lew G. Chua-eoan, San Diego, CA (US);

Charlie Matar, San Diego, CA (US);

Matthew L. Severson, San Diego, CA (US);

Xiaohua Kong, San Diego, CA (US);

Inventors:

Lew G. Chua-Eoan, San Diego, CA (US);

Charlie Matar, San Diego, CA (US);

Matthew L. Severson, San Diego, CA (US);

Xiaohua Kong, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device having an on-chip voltage regulator to control on-chip voltage regulation and methods for on-chip voltage regulation are disclosed. A semiconductor device includes a circuit positioned between a ground bus and a power bus. A power switch array is positioned between the circuit and one of the ground bus or the power bus to generate a virtual voltage across the circuit. A monitor is positioned between the ground bus and the power bus. The monitor is configured to simulate a critical path of the circuit and to output a voltage adjust signal based on an output of the simulated critical path. A controller is configured to receive the voltage adjust signal and to output a control signal to the power switch array to control the virtual voltage.


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