The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2014
Filed:
Dec. 05, 2012
Lsi Corporation, Milpitas, CA (US);
Anuroop Iyengar, Bangalore, IN (US);
LSI Corporation, San Jose, CA (US);
Abstract
Disclosed is a system and method for providing Process-Voltage-Temperature (PVT) compensation for an Input/Output interface. An embodiment may connect an analog section and a digital section together to generate and measure an oscillation frequency (F) used to look up a corresponding PVT control bit value in a look-up table. The analog section may be comprised of a voltage reduction system that reduces a bandgap reference voltage (V) to half the supplied Vto a current mirror that supplies a PVT current (I) to driver bit cells and a proportional mirrored control current (I) to a current controlled oscillator (CCO), which generates F. The digital section may be used in combination with a frequency variable resistor and beta multiplier connected to the CCO to calibrate the capacitance of the CCO to tune out the process variation of the CCO capacitance and render FOSC to be linearly dependent on I.