The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 2014
Filed:
Jul. 27, 2005
Yider Wu, Panchiao, TW;
Hiroyuki Ogawa, Sunnyvale, CA (US);
Unsoon Kim, San Jose, CA (US);
Angela T. Hui, Fremont, CA (US);
Yider Wu, Panchiao, TW;
Hiroyuki Ogawa, Sunnyvale, CA (US);
Unsoon Kim, San Jose, CA (US);
Angela T. Hui, Fremont, CA (US);
Spansion LLC, Sunnyvale, CA (US);
Globalfoundries Inc., Grand Cayman, KY;
Abstract
A memory device is provided including a substrate. A first dielectric layer is formed over the substrate. An isolation trench is formed in a portion of the substrate and the first dielectric layer. At least two charge storage elements are formed over the first dielectric layer on opposite sides of the isolation trench. A second dielectric layer is formed over the at least two charge storage elements. A control gate layer is formed over the second dielectric layer, where the isolation trench has a width suitable for reducing cross-coupling noise of charge storage elements, and where the at least two charge storage elements have a height suitable for providing sufficient gate coupling between the at least two charge storage elements and the control gate layer.