The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 2014

Filed:

Mar. 21, 2012
Applicants:

Mark D. Moravec, Lamlukka, TH;

Subrata I Gusti Made, Bangpa-In, TH;

Santi Pumkrachang, Bangkok, TH;

Inventors:

Mark D. Moravec, Lamlukka, TH;

Subrata I Gusti Made, Bangpa-In, TH;

Santi Pumkrachang, Bangkok, TH;

Assignee:

Western Digital (Fremont), LLC, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B 5/127 (2006.01); H04R 31/00 (2006.01); G11B 5/187 (2006.01); G11B 5/265 (2006.01); G11B 5/48 (2006.01); G11B 7/00 (2006.01); G11B 7/005 (2006.01); G11B 7/22 (2006.01);
U.S. Cl.
CPC ...
G11B 5/127 (2013.01); G11B 5/1272 (2013.01); G11B 5/187 (2013.01); G11B 5/2651 (2013.01); G11B 5/48 (2013.01); G11B 7/00 (2013.01); G11B 7/005 (2013.01); G11B 7/22 (2013.01);
Abstract

A method for manufacturing a read head includes the step of depositing a conductive filler into a plurality of holes that extend through a wafer. Each of the holes extends from a wafer top surface to a wafer bottom surface. Each of the holes includes an inner surface that includes an insulative layer. The method further includes the steps of fabricating a read transducer on the wafer top surface, and depositing a plurality of electrically conductive leading connection pads on the wafer bottom surface. The plurality of electrically conductive leading connection pads are in electrical contact with the conductive filler.


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