The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 2014
Filed:
Mar. 27, 2012
Minsik Cho, Austin, TX (US);
Ruchir Puri, Baldwin Place, NY (US);
Haoxing Ren, Austin, TX (US);
Xiaoping Tang, Mohegan Lake, NY (US);
Hua Xiang, Ossining, NY (US);
Matthew Mantell Ziegler, Sleepy Hollow, NY (US);
Minsik Cho, Austin, TX (US);
Ruchir Puri, Baldwin Place, NY (US);
Haoxing Ren, Austin, TX (US);
Xiaoping Tang, Mohegan Lake, NY (US);
Hua Xiang, Ossining, NY (US);
Matthew Mantell Ziegler, Sleepy Hollow, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Systems and methods for relative ordering circuit synthesis are provided herein. One aspect provides for generating at least one circuit design via at least one processor accessible by a computing device; wherein generating at least one circuit design comprises: generating at least one relative order structure based on at least one circuit design layout, the at least one relative order structure comprising at least one placement constraint associated with at least one circuit element; placing the at least one circuit element associated with the at least one placement constraint within a circuit design according to the at least one placement constraint; and placing circuit elements not associated with the at least one placement constraint within the circuit design. Other embodiments and aspects are also described herein.