The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2014

Filed:

Apr. 20, 2010
Applicants:

Srinivas Devadas, Lexington, MA (US);

Thomas J. Ziola, Menlo Park, CA (US);

Inventors:

Srinivas Devadas, Lexington, MA (US);

Thomas J. Ziola, Menlo Park, CA (US);

Assignee:

Verayo, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); H04L 9/32 (2006.01); H04L 9/08 (2006.01);
U.S. Cl.
CPC ...
H04L 9/3278 (2013.01); H04L 9/0877 (2013.01);
Abstract

A field configurable device, such as an FPGA, supports secure field configuration without using non-volatile storage for cryptographic keys on the device and without requiring a continuous or ongoing power source to maintain a volatile storage on the device. The approach can be used to secure the configuration data such that it can in general be used on a single or a selected set of devices and/or encryption of the configuration data so that the encrypted configuration data can be exposed without compromising information encoded in the configuration data.


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