The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2014
Filed:
Dec. 30, 2011
Applicants:
Magesh Valliappan, Austin, TX (US);
Lin Zheng, Newark, CA (US);
Bruce Howard Conway, Aliso Viejo, CA (US);
Inventors:
Magesh Valliappan, Austin, TX (US);
Lin Zheng, Newark, CA (US);
Bruce Howard Conway, Aliso Viejo, CA (US);
Assignee:
Broadcom Corporation, Irvine, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11B 20/20 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method and a system for accurately calculating the timing margin in a clock and data recovery system (CDR) is provided that utilizes a singular path environment of hardware. The method entails adding an amount of jitter within the CDR to change the receiver phase. The amount of jitter is incrementally increased until a threshold level of bit errors occur. Based on the amount of jitter needed to cause the threshold level of bit errors, timing margin can be calculated.