The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2014

Filed:

Feb. 10, 2012
Applicants:

Satoshi Aoki, Nagareyama, JP;

Kazuo Hatakeyama, Tokyo, JP;

Yasushi Nakajima, Yokohama, JP;

Inventors:

Satoshi Aoki, Nagareyama, JP;

Kazuo Hatakeyama, Tokyo, JP;

Yasushi Nakajima, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory includes a sense amplifier connected to one or more of bit lines and configured to sense data stored in the memory cells; and a word line driver configured to control a voltage of one or more of word lines. The memory cells constitute a memory block. The memory cells constitute a memory block being a unit of memory cells on which a data erasing operation is performed. A controller changes an erase condition during the data erasing operation performed on the memory block or a verify condition for a verify check of verifying whether the data has been erased from the memory cells in the memory block, in proportion to a ratio of number of predetermined logical value data to the data in the memory block or the page before the data erasing operation.


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