The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2014

Filed:

Jan. 02, 2013
Applicants:

Ganesh Ramaswamy Basawapatna, Greenwood Village, CO (US);

Varalakshmi Basawapatna, Greenwood Village, CO (US);

Anand Ganesh Basawapatna, Greenwood Village, CO (US);

Ashok Ram Basawapatna, Greenwood Village, CO (US);

Inventors:

Ganesh Ramaswamy Basawapatna, Greenwood Village, CO (US);

Varalakshmi Basawapatna, Greenwood Village, CO (US);

Anand Ganesh Basawapatna, Greenwood Village, CO (US);

Ashok Ram Basawapatna, Greenwood Village, CO (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/18 (2006.01); H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
Abstract

This invention describes a method by which a low cost low phase noise Phase Locked Loop or Phase Locked Loop based. Frequency Synthesizer can be realized. The new method, called a Translational Phase Lock Loop or TPLL, allows the conversion of a traditional voltage controlled oscillator or VCO signal so that the phase noise of the VCO signal is substantially identical to the noise that the loop is aimed to correct via comparison to a low noise reference oscillator. It overcomes additional problems associated with traditional and prior art phase lock loops in terms of unwanted spurious signals, complexity, and cost.


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