The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2014
Filed:
Aug. 04, 2011
Jong-hoon NA, Seongnam-si, KR;
Young-woo Park, Seoul, KR;
Dong-hwa Kwak, Suwon-si, KR;
Tae-yong Kim, Osan-si, KR;
Jee-hoon Han, Hwaseong-si, KR;
Jang-hyun You, Seoul, KR;
Dong-sik Lee, Yongin-si, KR;
Su-jin Park, Goyang-si, KR;
Jong-Hoon Na, Seongnam-si, KR;
Young-Woo Park, Seoul, KR;
Dong-Hwa Kwak, Suwon-si, KR;
Tae-Yong Kim, Osan-si, KR;
Jee-Hoon Han, Hwaseong-si, KR;
Jang-Hyun You, Seoul, KR;
Dong-Sik Lee, Yongin-si, KR;
Su-Jin Park, Goyang-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A method of fabricating a nonvolatile memory device includes providing a substrate having active regions defined by a plurality of trenches, forming a first isolation layer on the substrate having the plurality of trenches, forming a sacrificial layer on the first isolation layer to fill the trenches, the sacrificial layer including a first region filling lower portions of the trenches and a second region filling portions other than the lower portions, removing the second region of the sacrificial layer, forming a second isolation layer on the first isolation layer and the first region of the sacrificial layer, forming air gaps in the trenches by removing the first region of the sacrificial layer, and removing a portion of the first isolation layer and a portion of the second isolation layer while maintaining the air gaps.