The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2014
Filed:
Dec. 05, 2012
Denso Corporation, Kariya, JP;
Masashi Inagaki, Kariya, JP;
Kouji Ichikawa, Kariya, JP;
Makoto Tanaka, Nagoya, JP;
Hideki Kashiwagi, Kariya, JP;
DENSO CORPORATION, Kariya, JP;
Abstract
A design method of on-board wiring for a designed circuit includes determining a severity as a crosstalk prevention index for a pair of wires based on a generated noise level of a damaging side wire and a permissible noise level of a damaged side wire. The pair of wires is then assigned a severity class (SC) based on the severity determined. The SC is a pre-defined value range(s) for severity classification. Based on a preset SC specific permissible value list, one or more by-design permissible values belonging to the SC is generated for a design element of the pair of wires. A layout of the pair of wires on a board is constructed based on the by-design permissible value.