The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2014

Filed:

Dec. 21, 2011
Applicants:

Kikuko Sugimae, Yokohama, JP;

Satoshi Tanaka, Kawasaki, JP;

Koji Hashimoto, Yokohama, JP;

Masayuki Ichige, Yokohama, JP;

Inventors:

Kikuko Sugimae, Yokohama, JP;

Satoshi Tanaka, Kawasaki, JP;

Koji Hashimoto, Yokohama, JP;

Masayuki Ichige, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory includes: a plurality of active regions AA, AA, . . . , AA, which extend on a memory cell array along the column length; a plurality of non-uniformly arranged word line patterns WL, WL, . . . , extending along the row length; a plurality of select gate line patterns SG, SG, . . . , arranged parallel to the plurality of word line patterns; borderless contacts formed near the ends of the word line patterns on the memory cell array, in contact with part of an interconnect extended from the end of the memory cell array, but not in contact with interconnects adjacent to that interconnect; and bit line contacts formed within contact forming regions provided by removing part of the plurality of word line patterns and select gate line patterns through double exposure.


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