The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2014

Filed:

Feb. 06, 2013
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon, KR;

Inventors:

Kwang Soo Kim, Suwon, KR;

Bum Seok Suh, Suwon, KR;

In Hyuk Song, Suwon, KR;

Jae Hoon Park, Suwon, KR;

Dong Soo Seo, Suwon, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 29/7813 (2013.01); H01L 29/66727 (2013.01);
Abstract

Disclosed herein are a semiconductor device, and a method for manufacturing the semiconductor device. The semiconductor device includes a semiconductor substrate, a base region formed on an upper region of an inside of the semiconductor substrate, at least one gate electrode that penetrates through the base region and has an inverted triangular shape, a gate insulating film formed to enclose an upper portion of the semiconductor substrate and the gate electrode, an inter-layer insulating film formed on an upper portion of the gate electrode and the gate insulating film, an emitter region formed inside the base region and on both sides of the gate electrode, an emitter metal layer formed on an upper portion of the base region and inter-layer insulating film, and a buffer region formed to enclose a lower portion of the gate electrode and to be spaced apart from the base region.


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