The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 2014

Filed:

Sep. 15, 2011
Applicant:

Yee-chung Fu, Fremont, CA (US);

Inventor:

Yee-Chung Fu, Fremont, CA (US);

Assignee:

Advanced NuMicro Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for forming semiconductor devices with wafer-level packaging (WLP) includes providing a silicon-on-insulator (SOI) substrate, forming a mask on a silicon layer of the SOI substrate, etching the silicon layer through openings in the mask to form elements initially bonded to but later released from an insulator layer of the SOI substrate, bonding a support substrate to the silicon layer, depositing metal over through holes in the support substrate to contact the silicon layer, and singulating the semiconductor devices from the bonded SOI substrate and the support substrate. The support substrate defines depressions opposite the elements so the elements are not bonded to the support substrate. Each semiconductor device includes a hermetically sealed package having a portion of the SOI substrate and a portion of the support substrate.


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