The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2014
Filed:
May. 08, 2012
Wim Bogaerts, Melle, BE;
Joris Van Campenhout, Grimbergen, BE;
Peter Verheyen, Leuven, BE;
Philippe Absil, Leuven, BE;
Wim Bogaerts, Melle, BE;
Joris Van Campenhout, Grimbergen, BE;
Peter Verheyen, Leuven, BE;
Philippe Absil, Leuven, BE;
IMEC, Leuven, BE;
Universiteit Gent, Ghent, BE;
Abstract
Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.