The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2014
Filed:
Mar. 30, 2012
Paul J. Smith, Colorado Springs, CO (US);
Jeffrey K. Whitt, Colorado Springs, CO (US);
Eugene Saghi, Colorado Springs, CO (US);
Douglas J. Saxon, Colorado Springs, CO (US);
Joshua P. Sinykin, Shrewsbury, MA (US);
Paul J. Smith, Colorado Springs, CO (US);
Jeffrey K. Whitt, Colorado Springs, CO (US);
Eugene Saghi, Colorado Springs, CO (US);
Douglas J. Saxon, Colorado Springs, CO (US);
Joshua P. Sinykin, Shrewsbury, MA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
Methods and structure for correlating internal operational signals routed via different paths of a test signal selection hierarchy. The structure includes a functional block of circuitry operable to generate internal operational signals and clock signals. The integrated circuit also comprises a test signal selection hierarchy operable to receive the internal operational signals and the clock signals and to selectively route the internal operational signals and the clock signals. Further, structure includes a control unit operable to receive the clock signals from the test signal selection hierarchy, to determine a delay between received clock signals routed via different signaling pathways of the test signal selection hierarchy. The control unit is further operable to program a delay line based upon the delay between the clock signals and based upon internal operational signals correlated with the clock signals.